and Moving Objects Wiring the Schematic Annotation, Symbol Properties, and Footprints Electrical Rules Check Bill of Materials Tutorial Part 3: Circuit Board PCB Editor Basics Board Setup and Stackup Schematic Drawing A Board Outline Placing Footprints Routing Tracks Placing Copper Zones Design Rule Checking 3D Viewer Fabrication Outputs Tutorial Part 4: Custom Symbols and Footprints Library several utilities to help with circuit and PCB design, including a PCB calculator for determining electrical properties of circuit structures, a Gerber viewer for inspecting manufacturing files, a 3D viewer

编辑电路板 放置和绘制操作 Grids and snapping 编辑对象属性 电路板边框 (Edge Cuts) 使用封装 使用焊盘 使用敷铜 布线 图形对象 尺寸标注 Rule Areas (Keepouts) 向前和向后批注 锁定 Groups Creating Arrays 清理工具 检查电路板 2 2 3 3 4 5 5 5 7 7 drawing the rest of the zone outline. Zone properties are described in more detail below. Add rule area: Rule areas, formerly known as keepouts, can restrict the placement of items and the filling of zones designs. It is important to make sure zone fills are up-to-date before generating outputs. KiCad will check that zones have been updated and warn you before generating outputs or running DRC when zones have

drawing the rest of the zone outline. Zone properties are described in more detail below. Add rule area: Rule areas, formerly known as keepouts, can restrict the placement of items and the filling of zones Mechanical pads are non-plated through holes that do not have an electrical connection. SMD Aperture pads are pads that have no hole and no electrical connection. These can be used to add specific designs to internal bondwire lengths for more accurate length matching, or in other situations where the electrical length of a net is longer than the length of the routed tracks on the board. 22 The aperture

Designators and Symbol Annotation Electrical Connections Graphical items Schematic Setup 抢救缓存的符号 分层原理图 简介 Adding sheets to a design Navigating between sheets Electrical connections between sheets Hierarchical KiCad’s printed circuit design software. It can also export netlist files, which lists all the electrical connections, for other packages. The Schematic Editor includes a symbol library editor, which placed on symbol pins which are meant to be left unconnected. "No connect" flags indicate to the Electrical Rule Checker that the pin is intentionally unconnected and not an error. Place a junction. This

drawing the rest of the zone outline. Zone properties are described in more detail below. Add rule area: Rule areas, formerly known as keepouts, can restrict the placement of items and the filling of zones designs. It is important to make sure zone fills are up-to-date before generating outputs. KiCad will check that zones have been updated and warn you before generating outputs or running DRC when zones have electrically unconnected. In other words, islands are only removed from zones that have at least one electrical connection. 图形对象 图形对象 (直线、圆弧、矩形、圆、多边形和文本)可以存在于任何图层上，但不能分配给网络。矩形、圆和多边形可 以在其属性对话框中设置为填充或边框。线宽

to do in the schematic is to check for electrical errors. KiCad’s Electrical Rules Checker (ERC) cannot make sure that the design in the schematic will work, but it can check for some common connection annotated and typos in net labels. To see the full list of electrical rules and to adjust their severity, go to File → Schematic Setup… → Electrical Rules → Violation Severity. It is a good idea to run ERC 隐藏敷铜的填充与取消填充是不同的。 敷铜也可以使用外观面板使之透明，非活动层也可以使用外观面板中的 层显示选项 隐藏或调暗。 设计规则检查 Design Rule Checking is the layout equivalent of Electrical Rule Checking for the schematic. DRC looks for design mistakes like mismatches

to do in the schematic is to check for electrical errors. KiCad’s Electrical Rules Checker (ERC) cannot make sure that the design in the schematic will work, but it can check for some common connection annotated and typos in net labels. To see the full list of electrical rules and to adjust their severity, go to File → Schematic Setup… → Electrical Rules → Violation Severity. It is a good idea to run ERC 隐藏敷铜的填充与取消填充是不同的。 敷铜也可以使用外观面板使之透明，非活动层也可以使用外观面板中的 层显示选项 隐藏或调暗。 设计规则检查 Design Rule Checking is the layout equivalent of Electrical Rule Checking for the schematic. DRC looks for design mistakes like mismatches

on symbol pins which are meant to be left unconnected. "No-connection" flags indicate to the Electrical Rule Checker that the pin is intentionally unconnected and not an error. They also affect schematic grid size used for the Symbol pin or wire end off connection grid ERC check. Schematics typically use a 50 mil grid for electrical connections, so this should usually remain set at 50 mils. The Operating connected All symbol pins must be connected to a net, unless the pin has a no-connect flag or has electrical type Unconnected. Error Input pin not driven by any Output pins All Input pins must be connected

on symbol pins which are meant to be left unconnected. "No-connection" flags indicate to the Electrical Rule Checker that the pin is intentionally unconnected and not an error. Esc ~ 8 Place a junction Warnings, or ignored. 45 The Pin Conflicts Map allows you to configure connectivity rules to define electrical conditions for errors and warnings based on what types of pins are connected to each other. For 与子原理图中相应的层次标签相匹配，所以如果页码的名称被改变，标签也必须改变。 Shape changes the shape of the sheet pin, and has no electrical effect. It can be set to Input, Output, Bidirectional, Tri-state, or Passive. The pin’s font,

improved DRC checks and features, including mechanical clearance rules (as opposed to electrical clearance), custom rule severities, custom constraints for pad-to-zone connections, and footprint board-vs